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Type:
Bug
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Resolution: Unresolved
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Priority:
Medium
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Code Generation Tools
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CODEGEN-747
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SDSCM00048041
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C66x DSP CPU and Instruction Set Reference Guide (SPRUGH7 Nov 2010) section 3.8.12 (and subsections) has a long list of instructions that may not go in parallel, such as "DINT||NOP 5". The assembler does not detect some of these erroneous sequences and so therefore will not emit an error if such a sequence occurs in assembly. The C/C++ compiler does not produce these sequences when compiling C or C+, so the user of the compiler can safely assume these sequences won't occur if only compiling C or C+ code.
For example, the assembler does not detect the following erroneous sequences:
; asm does not detect erroneous sequence
IDLE
|| NOP 2
; asm does not detect erroneous sequence
NOP 3
|| SWE
; asm does not detect erroneous sequence
RINT
|| MVC.S2 B0, TSR