To fix issue, use __mnop() intrinsic. To detect the issue, build CLA files with --src_interlist option and review the generated CLA assembly files for MMOVD32 instructions to ensure that the three following instructions do NOT read from the MMOVD32's data copy write location.     MMOVD32 MR0, @0x9004 ; MR0=0x9004 0x9006=0x9004     MMOVD32 MR0, @0x9002 ; MR0=0x9002 0x9004=0x9002 <--- bad case     MMOV32 MR0, @0x9008, UNCF     MMOV32 MR1, @0x9004, UNCF ; read bad too early after write to 0x9004     MMOV32 MR2, @0x9006, UNCF ; read good after 1st MMOVD32 write to 0x9006

Some MMOVD32 instructions may have a read of the data-copied memory location too soon after the data-copy write. MMOVD32 MR0,mem32 does below operations:   MR0 = [mem32];   [mem32+2] = [mem32]; data copy to mem32+2 location The bug occurs when the MMOVD32's data-copy-write is read by a later MOV instruction within the next 3 instructions (read too soon after write).      See spruh18d table 9-16 for pipeline read-before-write issue. Below example initializes struct of floats followed by math operations using several data members. C code typedef struct testfloats{     float six;     float five;     float four;     float two;     float three;     float float1;     float float2;     float float3;     float float4;     float result; } testflt; pragma DATA_SECTION(cla_sTest,"Cla1ToCpuMsgRAM"); testflt cla_sTest; CLA code     cla_sTest.two = 2.0f;     cla_sTest.three = 3.0f;     cla_sTest.four = 4.0f;     cla_sTest.five = 5.0f;     cla_sTest.six = 6.0f;     cla_sTest.four = cla_sTest.five;     cla_sTest.five = cla_sTest.six;     ; <--- adding __mnop() here will avoid the issue     cla_sTest.float = cla_sTest.two * cla_sTest.five                            + cla_sTest.three * cla_sTest.four; CLA assembly         MMOVD32 MR0,@_cla_sTest+2 ; MR0=cla_sTest+2                                                                   cla_sTest+4=cla_sTest+2         MMOVD32 MR0,@_cla_sTest ; MR0=cla_sTest                                                                   cla_sTest+2=cla_sTest         MMOV32 MR0,@_cla_sTest+6 ; <-- need 2 MNOP's here         MMOV32 MR1,@_cla_sTest+2 ; cla_sTest+2 read too soon         MMOV32 MR2,@_cla_sTest+4 ; cla_sTest+4 read is good here         MMOV32 MR1,@_cla_sTest+8 ; || MMPYF32 MR0,MR1,MR0         MMPYF32 MR1,MR2,MR1         MADDF32 MR0,MR1,MR0         MMOV32 @_cla_sTest+16,MR0 The 2nd MMOVD32 data copy to cla_sTest+2 needs 3 instructions between the write and any following reads from same memory location.