At the maximum sampling rate of 200 kHz, CC26X2 devices have 120 clock cycles at 120 MHz to perform the ADC conversion. The hardware requires 118 clock cycles to perform the ADC conversion. Clock switching from XOSC_HF to RCOSC_HF, and vice-versa, consumes two clock periods.

During clock source switching, using the TI Power driver, the ADC will run off a different clock source than the timer that generates the ADC triggers for a while. This is a problem, because the clock switch itself uses the whole time margin, so there is no margin left for any rate differences between the XOSC and the RCOSC. The next trigger as a result may be generated while a conversion is ongoing and thus do nothing.