C2000_18.12.0.LTS

Higher optimization levels, --opt_level=2 or greater, helped to offset this issue.

For fast integer division feature, --idiv_support=idiv0, cases involving I64, UI64, I16 and UI16 were loading integer values to FPU registers by first loading to CPU registers, followed by the CPU-to-FPU register moves which add extra delay slots.