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Type: Bug
Resolution: Won't Fix
Priority: Urgent

Product:
Code Generation Tools
Internal ID:
CODEGEN-5452
Forum URL:
https://e2e.ti.com/support/processors/f/791/t/736291
Found In Release:

Hide
C6000_8.3.0
C6000_7.4.23

Show
C6000_8.3.0 C6000_7.4.23
Workaround:
Disable software pipelining.
Decline Reason:
No compiler bug identified. Can be reopened if needed.

Wrong instruction schedule for load of ILC and SPLOOP

Assignee:: TI User
Reporter:: TI User
Votes:: 0 Vote for this issue
Watchers:: 0 Start watching this issue

Created:: 16/Oct/18 5:42 PM
Updated:: 19/Feb/20 11:00 PM
Resolved:: 16/Oct/18 5:42 PM

Connection: Intermediate to External PROD System

EXTSYNC-1610 - Wrong instruction schedule for load...
SYNCHRONIZED

Last Sync Date:

19/Feb/20 22:52 PM