Assembler accepts but mistranslates BLLT in v7 thumb mode

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    • Type: Bug
    • Resolution: Unresolved
    • Priority: Medium
    • Code Generation Tools
    • CODEGEN-967
    • SDSCM00051086
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      ARM_15.12.0.LTS
      ARM_18.1.0.LTS
      ARM_16.9.0.LTS
      ARM_18.12.0.LTS
      ARM_20.2.0.LTS
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      ARM_15.12.0.LTS ARM_18.1.0.LTS ARM_16.9.0.LTS ARM_18.12.0.LTS ARM_20.2.0.LTS

      For v7 thumb 2 mode, the assembler should accept conditional instructions and automatically generate the appropriate IT instruction preceding it.

      For v7 thumb mode, the assembler should accept the BLLT instruction, which is BL conditioned with LT, and turn it into "IT LT" followed by "BL LT." However, it accepts the instruction and turns it into "BL", which is wrong.

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            TI User
            Reporter:
            TI User
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              Created:
              Updated:

                Connection: Intermediate to External PROD System
                EXTSYNC-567 - Assembler accepts but mistranslates...
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