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Type: Bug
Resolution: Unresolved
Priority: Medium

Product:
Code Generation Tools
Internal ID:
CODEGEN-927
OldID:
SDSCM00050861
Found In Release:

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ARM_15.12.0.LTS
ARM_18.1.0.LTS
ARM_16.9.0.LTS
ARM_18.12.0.LTS
ARM_5.2.0B1
ARM_20.2.0.LTS

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ARM_15.12.0.LTS ARM_18.1.0.LTS ARM_16.9.0.LTS ARM_18.12.0.LTS ARM_5.2.0B1 ARM_20.2.0.LTS

TI's assembler does not accept the 2-operand syntax for specifying the 3-operand Arm ADD instruction.

Assignee:: TI User

Reporter:: TI User

Votes:: 0 Vote for this issue

Watchers:: 0 Start watching this issue

Created:: 11/Sep/14 6:14 PM

Updated:: 16/Nov/22 3:52 PM

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