TI Assembler should accept 2-operand add in ARM mode

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    • Type: Bug
    • Resolution: Unresolved
    • Priority: Medium
    • Code Generation Tools
    • CODEGEN-927
    • SDSCM00050861
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      ARM_15.12.0.LTS
      ARM_18.1.0.LTS
      ARM_16.9.0.LTS
      ARM_18.12.0.LTS
      ARM_5.2.0B1
      ARM_20.2.0.LTS
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      ARM_15.12.0.LTS ARM_18.1.0.LTS ARM_16.9.0.LTS ARM_18.12.0.LTS ARM_5.2.0B1 ARM_20.2.0.LTS

      TI's assembler does not accept the 2-operand syntax for specifying the 3-operand Arm ADD instruction.

            Assignee:
            TI User
            Reporter:
            TI User
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              Created:
              Updated:

                Connection: Intermediate to External PROD System
                EXTSYNC-549 - TI Assembler should accept 2-operan...
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