F29 Disassembly view binary output is incorrect for 48-bit+ packets

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    • Type: Bug
    • Resolution: Unresolved
    • Priority: Not Prioritized

      For F29 devices, the binary of 48-bit or larger instruction packets in the 'Disassembly View' displays the second halfword twice, rather than displaying the third halfword.

      0x10002172 0fa8 2f47 2f47      CALL    @#0x10108000
      0x10002178 0a44 0004 0004      MV      A4,#0x30180004}}
      

      In the 'Memory View', this shows correctly as `2F470FA8 0A440008 30180004`, which corrected for little endian would display as:

      0fa8 2f47 0008
      0a44 0004 3018
      

      This is correct (as the operand of 48-bit instructions is little endian, and `CALL` instructions are calculated as signed offsets), however the displayed disassembly is not.

      This always applies to the third halfword of the packet, even when it is not the third in an instruction, for example:

      0x1000227C 8f66 a911 a911 7325 0048 0120
                                           BCMP    @#0x1000230c,A.LT,A9,A0
                                        || SUBR.U16        A1,A1,#0x4
                                        || MV      A2,A5
      

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            TI User
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              Created:
              Updated:

                Connection: Intermediate to External PROD System
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