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Type: Bug
Resolution: Fixed
Priority: High

Product:
Linux Core SDK
Internal ID:
LCPD-42861
Found In Release:
09.03
Fix In Release:
11.02
Affected Platform/Device:

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am335x-evm
am335x-hsevm
am335x-ice
am335x-sk

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am335x-evm am335x-hsevm am335x-ice am335x-sk

Delay timing from DDR_RESET rising edge to DDR_CKE should be min or 500us, but AM335x DDR driver incorrectly configures for much shorter. (see https://e2e.ti.com/support/processors-group/processors/f/processors-forum/1302074/am3354-delay-between-ddr_cke-and-ddr_reset-configuration-in-spl for details)

Fixed by:
https://git.ti.com/cgit/ti-u-boot/ti-u-boot/commit/?h=ti-u-boot-2025.01&id=2c6112b9fa227da3ff89d95d64d25d7a9097354c
https://git.ti.com/cgit/ti-u-boot/ti-u-boot/commit/?h=ti-u-boot-2025.01&id=3b1498db48e6cef909d2353a7bec951b19116d45

Assignee:: TI User
Reporter:: TI User
Votes:: 0 Vote for this issue
Watchers:: 2 Start watching this issue

Created:: 20/Jan/26 4:58 PM
Updated:: 20/Jan/26 4:58 PM
Resolved:: 20/Jan/26 4:58 PM

Connection: Intermediate to External PROD System

EXTSYNC-6118 - AM335x DDR initialization timing in...
SYNCHRONIZED

Last Sync Date:

20/Jan/26 16:58 PM