CPSW ALE Table Reads Return Incorrect Values After Prolonged Operation (>20M Runs)

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    • Type: Bug
    • Resolution: Unresolved
    • Priority: Medium
    • Ethernet Switch Firmware
    • ETHFW-2586
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      https://e2e.ti.com/support/processors-group/processors/f/processors-forum/1327631/tda4vm-cpsw9g_ale-may-get-wrong-value-when-reading-reg-cpsw_ale_tblw1
    • ETHFW_07_00_00
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      j721e-evm
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      j742s2-evm
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      j721e-evm j7200-evm j721s2-evm j784s4-evm j742s2-evm
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      The present workaround involves triggering ALE read for a particular index twice before reading the values returned. Details on how to trigger ALE read can be found by looking at the available CPSW ALE registers in the peripherals section of device specific TRMs.
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      The present workaround involves triggering ALE read for a particular index twice before reading the values returned. Details on how to trigger ALE read can be found by looking at the available CPSW ALE registers in the peripherals section of device specific TRMs.

      When reading specific ALE entries constantly in CPSW 9G, CPSW 5G and CPSW 2G, it is observed that the ALE table words return 0's after many iterative ALE index reads (>20M). It was observed that for these iterations where ALE table returns all 0's, the ALE table entry index that is being read is different from the one that was intended, this causes the issue described above.

      This issue is seen across different devices and in multiple CPSW peripherals (CPSW 9G, 5G and 2G). The issue is more prominent when different ALE indexes(For example: index 0 and index 511) are read consecutively over many iterations.

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                Connection: Intermediate to External PROD System
                EXTSYNC-5896 - CPSW ALE Table Reads Return Incorre...
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