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Type:
Bug
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Resolution: Unresolved
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Priority:
Medium
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Code Generation Tools
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CODEGEN-13238
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C2000_NEXT*
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default
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C28 interrupt routines use 14 more words of stack than is reported by the compiler debug directives which impacts CCS Stack usage assistant.
For C28 interrupt routines, the hardware automatically stores below registers to the stack when the interrupt is triggered:
ST0, T, AL, AH, PL, PH, AR0, AR1, ST1, DP, IER, DBGSTAT, PC
There is no debug info emitted to account for above.
The compiler does correctly emit debug directives for the explicit stack saves/restores that occur at start/end of ISR routine as well as one implicit hardware save/restore of RPC.
For below C28 ISR example, CCS stack usage tool reports: 10 words
Dwarf debug directives account for explicit save/restores of:
RB STF R0H R1H
as well as the implicit hardware save/restore of:
RPC
float a,b,c; __attribute__((interrupt))
void foo_isr(void)
{
c = a + b;
}
Generated assembly:
||foo_isr||:
.dwcfi cfa_offset, -2 implicit RPC save
.dwcfi save_reg_to_mem, 26, 0
ASP ; [CPU_ALU]
PUSH RB ; [CPU_FPU] save RB
.dwcfi save_reg_to_mem, 74, 4
.dwcfi cfa_offset, -4
MOV32 *SP++,STF ; [CPU_FPU] save STF
.dwcfi save_reg_to_mem, 40, 6
.dwcfi cfa_offset, -6
MOV32 *SP++,R0H ; [CPU_FPU] save R0H
.dwcfi save_reg_to_mem, 43, 8
.dwcfi cfa_offset, -8
MOV32 *SP++,R1H ; [CPU_FPU] save R01
.dwcfi save_reg_to_mem, 47, 10
.dwcfi cfa_offset, -10
SETFLG RNDF32=1, RNDF64=1 ; [CPU_FPU]
CLRC PAGE0,OVM ; [CPU_ALU]
CLRC AMODE ; [CPU_ALU]
MOVW DP,#||a|| ; [CPU_ARAU]
MOV32 R0H,@||a|| ; [CPU_FPU] |3|
MOV32 R1H,@||b|| ; [CPU_FPU] |3|
ADDF32 R0H,R0H,R1H ; [CPU_FPU] |3|
NOP ; [CPU_ALU]
MOV32 @||c||,R0H ; [CPU_FPU] |3|
MOV32 R1H,*--SP ; [CPU_FPU]
.dwcfi cfa_offset, -8
.dwcfi restore_reg, 47
MOV32 R0H,*--SP ; [CPU_FPU]
.dwcfi cfa_offset, -6
.dwcfi restore_reg, 43
MOV32 STF,*--SP ; [CPU_FPU]
.dwcfi cfa_offset, -4
.dwcfi restore_reg, 40
POP RB ; [CPU_FPU]
.dwcfi cfa_offset, -2
.dwcfi restore_reg, 74
NASP ; [CPU_ALU]
