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  1. Embedded Software & Tools
  2. EXT_EP-11861

Set Owner HOST ID of DM core to MCU_0_R5_0

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    • Icon: Bug Bug
    • Resolution: Fixed
    • Icon: Medium Medium
    • PDK
    • PDK-13564
    • PROCESSOR_SDK_09.01.00
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      Description
      In function Sciclient_pmSetCpuResetMsgProxy and Sciclient_pmSetMsgProxy, TISCI_MSG_PROC_SET_CONTROL is called to change the processor control of MCU R5_0.
      After SBL, HOST_ID for MCU is updated as HOST_ID_FREE from TISCI_HOST_ID_R5_0.

      Due to host ID mismatch, TISCI_MSG_PROC_SET_CONTROL API returns error.

      Resolution
      Modified code to update the host id to HOST_MCU_0_R5_0 from DM before calling TIFS.

      Root Cause

      • DM implements special device handling on mcu1_0/mcu1_1 cores for CPU resets and LPSC config as DM cannot reset itself. Sciclient defines Sciclient_pmSetCpuResetMsgProxy
        and Sciclient_pmSetMsgProxy for this handling
      • Here DM will internally call Sciclient_procBootSetSequenceCtrl
        function with different flags and forward the message to TIFS.
      • TIFS will only execute the operation if the request host ID is same as owner host id.
      • In RTOS, SBL will request for MCU R5 and release the control of the core, owner host is updated to HOST_ID_FREE
      • Linux will request for MCU R5 and owner host id will be updated to HOST_A72_2
      • In both flows, owner id for MCU R5 will not be host id HOST_MCU_0_R5_0 (DM HOST)
      • Due to mismatch in host id, TIFS was NACKing the message

            syncuser TI User
            syncuser TI User
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              Created:
              Updated:
              Resolved: