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  1. Embedded Software & Tools
  2. EXT_EP-11596

Using 32bit counters sometimes results in counter size mismatch around increment.step

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    • Icon: Bug Bug
    • Resolution: Fixed
    • Icon: Medium Medium
    • Code Generation Tools
    • CODEGEN-11890
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      ARMCLANG_2.1.0.LTS
      ARMCLANG_3.2.0.LTS
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      ARMCLANG_2.1.0.LTS ARMCLANG_3.2.0.LTS
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      ARMCLANG_2.1.4.LTS*
      ARMCLANG_3.2.2.LTS*
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      ARMCLANG_2.1.4.LTS* ARMCLANG_3.2.2.LTS*
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      Build attached test case with code coverage and 32bit pointers

      tiarmclang -O0 -mcpu=cortex-m0plus -mfloat-abi=soft dl_flashctl.c -c -fcoverage-mapping -fmcdc -fprofile-counter-size=32 -fprofile-instr-generate 

      This results in an error that is difficult to decipher:

      fatal error: error in backend: Do not know how to expand this operator's operand!

      The actual cause is that the compiler errs when lowering an "increment.step" intrinsic that is instrumented to increment a 32bit counter using a 64bit value.  Because the two values are not the same type, the lowering fails.  Standard increments work just fine.  The compiler uses the increment.step intrinsic to conditionally increment the counter by using the result of a comparison operation as its increment "step value".

      Workaround is to avoid using 32bit counters: -fprofile-counter-size=64 (or remove the option from the build).

            syncuser TI User
            syncuser TI User
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              Created:
              Updated:
              Resolved: