Uploaded image for project: 'Embedded Software & Tools'
  1. Embedded Software & Tools
  2. EXT_EP-11559

Incorrect bit shift for B and C bit during R5 MPU Configuration

XMLWordPrintable

    • Icon: Bug Bug
    • Resolution: Fixed
    • Icon: High High
    • PDK
    • PDK-13231
    • PROCESSOR_SDK_09.00.00
    • PROCESSOR_SDK_09.01.00
    • Hide
      j721e-evm
      j721e-hsevm
      j721s2-evm
      j721s2-hsevm
      j784s4-evm
      j784s4-hsevm
      Show
      j721e-evm j721e-hsevm j721s2-evm j721s2-hsevm j784s4-evm j784s4-hsevm

      Description
      The bit shift for memory attribute is incorrect for R5 MPU Config. gMemAttr[gCslR5MpuCfg[loopCnt].memAttr][1U] is actually the C bit as per gMemAttr array, but B bit value is used for shift operation.

      Resolution Description
      Fixed the bit shift swap of the b an c bits in the region attributes.

      Root Cause
      Coding error where B and C bit were swapped in MPU configuration

            syncuser TI User
            syncuser TI User
            Votes:
            0 Vote for this issue
            Watchers:
            2 Start watching this issue

              Created:
              Updated:
              Resolved: