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Type:
Bug
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Resolution: Fixed
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Priority:
Medium
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PDK
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PDK-13207
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PROCESSOR_SDK_08.06.00
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PROCESSOR_SDK_09.01.00
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Issue Description
When enabling PVU0/PVU1 on the J721S2 and J784S4, have been unable to get the MAIN NAVSS Interrupt router programmed to map the PVU0/1 to GIC interrupts when using the SciClient APIs.
Workaround
When programming the interrupt router manually using direct register writes the PVU interrupts are generated and handled on the A72 as expected.