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Bug
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Resolution: Fixed
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Medium
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PDK
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PDK-12551
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PROCESSOR_SDK_08.05.00
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PROCESSOR_SDK_09.01.00
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The MAIN2MCU_LVL INTR has 64 output lines, out of which ROM configures certain output lines starting at 32. The RM IR driver code has logic to clean these up when any of the input or output falls into this ROM range.
This data is completely missing from J721S2 and J784S4. Here's a data dump at U-Boot prompt.
J784S4
=> => md.l 0xa10000 00a10000: 66948100 00000000 00000000 00000000 ...f............ 00a10010: 00000000 00000000 00000000 00000000 ................ 00a10020: 00000000 00000000 00000000 00000000 ................ 00a10030: 00000000 00000000 00000000 00000000 ................ 00a10040: 00000000 00000000 00000000 00000000 ................ 00a10050: 00000000 00000000 00000000 00000000 ................ 00a10060: 00000000 00000000 00000000 00000000 ................ 00a10070: 00000000 00000000 00000000 00000000 ................ 00a10080: 00000000 0001001c 0001001d 00010080 ................ 00a10090: 00010081 00010082 00010083 00010084 ................ 00a100a0: 00010085 00010086 00010087 00000000 ................ 00a100b0: 00000000 00000000 00000000 00000000 ................ 00a100c0: 00000000 00000000 00000000 00000000 ................ 00a100d0: 00000000 00000000 00000000 00000000 ................ 00a100e0: 00000000 00000000 00000000 00000000 ................ 00a100f0: 00000000 00000000 00000000 00000000 ................ =>
J721S2
=> md.l 0xa10000 00a10000: 66948100 00000000 00000000 00000000 ...f............ 00a10010: 00000000 00000000 00000000 00000000 ................ 00a10020: 00000000 00000000 00000000 00000000 ................ 00a10030: 00000000 00000000 00000000 00000000 ................ 00a10040: 00000000 00000000 00000000 00000000 ................ 00a10050: 00000000 00000000 00000000 00000000 ................ 00a10060: 00000000 00000000 00000000 00000000 ................ 00a10070: 00000000 00000000 00000000 00000000 ................ 00a10080: 00000000 0001001c 0001001d 00010080 ................ 00a10090: 00010081 00010082 00010083 00010084 ................ 00a100a0: 00010085 00010086 00010087 00000000 ................ 00a100b0: 00000000 00000000 00000000 00000000 ................ 00a100c0: 00000000 00000000 00000000 00000000 ................ 00a100d0: 00000000 00000000 00000000 00000000 ................ 00a100e0: 00000000 00000000 00000000 00000000 ................ 00a100f0: 00000000 00000000 00000000 00000000 ................
J721E
=> md.l 0xa10000 00a10000: 66948100 00000000 00000000 00000000 ...f............ 00a10010: 00000000 00000000 00000000 00000000 ................ 00a10020: 00000000 00000000 00000000 00000000 ................ 00a10030: 00000000 00000000 00000000 00000000 ................ 00a10040: 00000000 00000000 00000000 00000000 ................ 00a10050: 00000000 00000000 00000000 00000000 ................ 00a10060: 00000000 00000000 00000000 00000000 ................ 00a10070: 00000000 00000000 00000000 00000000 ................ 00a10080: 00000000 0001001c 0001001d 00010080 ................ 00a10090: 00010081 00010082 00010083 00010084 ................ 00a100a0: 00010085 00010086 00010087 00010088 ................ 00a100b0: 00010089 0001008a 0001008b 0001008c ................ 00a100c0: 0001008d 0001008e 0001008f 00000000 ................ 00a100d0: 00000000 00000000 00000000 00000000 ................ 00a100e0: 00000000 00000000 00000000 00000000 ................ 00a100f0: 00000000 00000000 00000000 00000000 ................
This causes failures to reconfigure these output interrupt lines either in a MCU1_0 or MCU1_1 applications. This would have easily been shown on a MCU1_1 application which currently uses the 32 to 63 range of the MAIN2MCU Interrupt Router.
Issue found during customer debug when trying to exercise MAIN domain MCAN4 through MCAN15 from MCU R5F by extending the current IRQ range to allow for more interrupts to be allocated from MCU1_0.
