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  1. Embedded Software & Tools
  2. EXT_EP-10981

CSIRX: Incorrect DATA Shift value for RAW8 mode

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    • Icon: Bug Bug
    • Resolution: Fixed
    • Icon: Medium Medium
    • PDK
    • PDK-12241
    • PROCESSOR_SDK_08.04.00
    • PROCESSOR_SDK_08.06.00
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      In case of RAW8 capture, it is possible to send 4 pixels per clock cycle in CSIRX. But this require dataSizeShift to be set to 32bits. Driver incorrectly configures it to 8bits, in below code.

       
      File name:drv/csirx/src/csirx_drvUdma.c
      Function name:CsirxDrv_getDMACfgParams()
       
      if (chObj->chCfg->inCsiDataType == FVID2_CSI2_DF_RAW20)

      { chObj->dmaCfgParams.dataSizeShift = (uint32_t)CSL_CSIRX_DMA_DATA_SIZE_SHIFT_32BITS; }
      else if ((chObj->chCfg->inCsiDataType == FVID2_CSI2_DF_YUV420_10B) ||
      (chObj->chCfg->inCsiDataType == FVID2_CSI2_DF_YUV422_10B) ||
      (chObj->chCfg->inCsiDataType == FVID2_CSI2_DF_RAW10) ||
      (chObj->chCfg->inCsiDataType == FVID2_CSI2_DF_RAW12) ||
      (chObj->chCfg->inCsiDataType == FVID2_CSI2_DF_RAW14) ||
      (chObj->chCfg->inCsiDataType == FVID2_CSI2_DF_RAW16))
      {
      if (createParams->instCfg.numPixelsStrm0 == 0U) { chObj->dmaCfgParams.dataSizeShift = (uint32_t)CSL_CSIRX_DMA_DATA_SIZE_SHIFT_16BITS; }
      else if(createParams->instCfg.numPixelsStrm0 == 1U){ chObj->dmaCfgParams.dataSizeShift = (uint32_t)CSL_CSIRX_DMA_DATA_SIZE_SHIFT_32BITS; }

      else

      { /* Do nothing as above two conditions should be hit and check has done before entering this function */ }

      }
      else

      { *chObj->dmaCfgParams.dataSizeShift =* *(uint32_t)CSL_CSIRX_DMA_DATA_SIZE_SHIFT_8BITS;* }

            syncuser TI User
            syncuser TI User
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              Created:
              Updated:
              Resolved: