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  1. Embedded Software & Tools
  2. EXT_EP-10832

LTO: Compiling a source file with cortex-r4/r5 with -mthumb and linking with ARM mode cortex-r4/r5 runtime libraries improperly resolves an R_ARM_CALL relocation

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Details

    • Bug
    • Status: Fixed
    • High
    • Resolution: Fixed
    • Code Generation Tools
    • CODEGEN-10000
    • ARMCLANG_2.1.0.LTS
    • ARMCLANG_2.1.1.LTS*
    • default
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      This issue can be avoided if any of the following is true:
      - The compile and link steps of the build are performance as separate tiarmclang commands (as they are when building a project with Code Composer Studio (CCS))
      - Link-Time Optimization (LTO) is not enabled (-flto option is not used in compile and link tiarmclang command)
      - All C/C++ and assembly source files are compiled/assembled for ARM mode
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      This issue can be avoided if any of the following is true: - The compile and link steps of the build are performance as separate tiarmclang commands (as they are when building a project with Code Composer Studio (CCS)) - Link-Time Optimization (LTO) is not enabled (-flto option is not used in compile and link tiarmclang command) - All C/C++ and assembly source files are compiled/assembled for ARM mode

    Description

      Compile and link a simple main() program containing a printf() call with -mthumb option:
      %> tiarmclang -mcpu=cortex-r4 -mthumb -mfloat-abi=soft -flto -O3 -v cutdown.c -o cutdown.out -Wl,-llnk.cmd,-mcutdown.map

      When the resulting cutdown.out is loaded and run with load470, the simulator fails to decode an instruction at the beginning of a runtime library function that was compiled in ARM mode.

      With Link-Time Optimization (LTO) turned on, the LTO generated object file contains a legitimate call from one ARM function to another ARM function that is annotated with a relocation to resolve the state and location of the callee function in the call instruction's opcode.

      Unfortunately, the handling of the relocation is changing the BL instruction into a BLX instruction that will put the processor in THUMB mode before it arrives at the start of the ARM mode callee function.

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            syncuser TI User
            syncuser TI User
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              Created:
              Updated:
              Resolved: