J721E_EVM CPU reset error for Cortex-R5

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    • Type: Bug
    • Resolution: Unresolved
    • Priority: Not Prioritized

      Error occurs when attempting to perform a CPU reset on the R5 core of a J721E EVM.

      Failed CPU Reset: (Error -1320 @ 0x0) Device could not be halted after reset occurred. (Emulation package 9.6.0.00172).

            Assignee:
            TI User
            Reporter:
            TI User
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              Created:
              Updated:

                Connection: Intermediate to External PROD System
                EXTSYNC-3293 - J721E_EVM CPU reset error for Corte...
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