Customer has found that running run_app_tidl_od.sh while there is large load on A72 core causes the demo to hang and freeze during their 4 hour aging test. Linked is the E2E thread:

https://e2e.ti.com/support/processors-group/processors---internal/f/processors---internal-forum/1042409/tda4vm-tidl-instability-at-high-cpu-a72-load#pifragment-322104=1

We found an issue with idle task stack overflowing, so we disabled preemptive interrupts and increase idle task stack. 

Attached are screenshots of the C7x registers and function that IEAR register is pointing to when the hang occurs.

**New update 11/11/2021

On my setup:

• SE0_FAR register reports the address of 0x06485F400 which corresponds to the address pointed to by SE0_ADDR8 and SE0_ADDR9 when hang occurs
• SE0_FSR register reports 0x01005 which documentation says is Internal Storage Parity Error
• SE1_FAR and FSR registers report 0x0 which should mean that they are fine

On customer setup:

• SE*1*_FSR register reports 0x01005
• SE1_FAR register reports 0x06482AA00 which does not correspond to any SE1 address at the time of error.
• IEAR value was 0
• IERR value was 0

We have tried increasing processor voltage from 0.8V to 0.825V since parity error was seen during our voltage sweep test at low voltage. However, the error still persists.

Attached screenshots of these registers. Additionally, attached a c7x register dump from customer