When calling UART2_open, the default behaviour for the UART2_EVENT_TX_FINISHED interrupt event is to be generated when half the TX FIFO has been transmitted, rather than when the entire transmission is complete. More specifically, the EOT-bit in UARTCTL is left at 0 during initialisation.

Solution:

Instead, the EOT-bit should be set to 1 for a more logical function of the TX_FINISHED event. (1 = The TXRIS bit is set only after all transmitted data, including stop bits, have cleared the serializer)

UARTTxIntModeSet should be called with argument UART_TXINT_MODE_EOT in both UART2CC26X2_initHw and UART2CC32XX_initHw