Disassembly view doesn't decode a VDIV.F64 instruction in a TMS570LC43x (Cortex-R5 big endian) program

XMLWordPrintable

    • Type: Bug
    • Resolution: Unresolved
    • Priority: Medium

      Disassembly view doesn't decode a VDIV.F64 instruction in a TMS570LC43x (Cortex-R5 big endian) program. It is simply displayed as: ".word 0xee810b00".

      The Cortex-R5 is in ARM mode and changing the Disassembly Style from "Mixed ARM/Thumb" to "ARM Only" didn't make a difference.

      Looking at the assembler listing saved by the compiler shows the expected VDIV.F64 instruction with the encoding of EE810B00.

            Assignee:
            TI User
            Reporter:
            TI User
            Votes:
            0 Vote for this issue
            Watchers:
            2 Start watching this issue

              Created:
              Updated:

                Connection: Intermediate to External PROD System
                EXTSYNC-3035 - Disassembly view doesn't decode a V...
                SYNCHRONIZED
                • Last Sync Date: