-
Enhancement
-
Resolution: Implemented
-
Medium
-
Code Generation Tools
-
CODEGEN-9098
-
C2000_21.6.0.LTS
-
-
default
The attached test case contains this code ...
extern uint16_t a, b; int fxn() { return a < b; }
Build it ...
% cl2000 --cla_support=cla1 --src_interlist file.cla
Inspect the resulting assembly file to see ...
;---------------------------------------------------------------------- ; 7 | return a < b; ;---------------------------------------------------------------------- MMOVZ16 MR1,@_b ; [CPU_FPU] |7| MMOVZ16 MR2,@_a ; [CPU_FPU] |7| MLSL32 MR1,#16 ; [CPU_FPU] |7| MLSL32 MR2,#16 ; [CPU_FPU] |7| MLSR32 MR1,#16 ; [CPU_FPU] |7| MLSR32 MR2,#16 ; [CPU_FPU] |7| MCMP32 MR1,MR2 ; [CPU_FPU] |7|
The instruction MMOVZ16 zeros out the upper half of the register. Therefore, there is no need for the 4 shift instructions.