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Bug
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Resolution: Fixed
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High
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PDK
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PDK-9694
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PROCESSOR_SDK_07.03.00
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PROCESSOR_SDK_08.00.00
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j721e-evm
CSITX supports limited lane speed as given in the gDphyCfg table in the file csitx\soc\V0\csitx_soc.c. When customer tried different lane speed, other than supported in this table, it defaults to 800Mpbs speed.