In the Board_init, McSPI clock is configured for 50MHz.

{ TISCI_DEV_MCSPI0, TISCI_DEV_MCSPI0_CLKSPIREF_CLK, 50000000 }

, //MAIN_PLL0_HSDIV5_CLKOUT

but in McSPI example, inputClkFreq variable is used as 48MHz. Because of this mismatch, output clock rate is not matching.