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Bug
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Resolution: Fixed
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High
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PDK
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PDK-9433
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PROCESSOR_SDK_07.02.00
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PROCESSOR_SDK_08.00.00
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j721e-evm
MASTER_BYPASS bit is by default reset in the PDK OSPI driver. But this should be controlled based on the clock.
It should be set for clock upto 166MHz and reset for clock exactly 166MHz.
Without this fix, read can fail in DMA mode.