Increase in Boot time when DDR ECC is enabled

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    • Type: Bug
    • Resolution: Fixed
    • Priority: Medium
    • PDK
    • PDK-9437
    • PROCESSOR_SDK_07.02.00
    • PROCESSOR_SDK_08.00.00
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      When ECC is enabled in DDR initialization, boot time is increased by almost a sec. This seems to be happening because the entire 2GB DDR is primed with a value in below code snippet. This requires optimization.

      /* Prime memory with known pattern */
      for (memPtr = BOARD_DDR_START_ADDR; memPtr < BOARD_DDR_ECC_END_ADDR; memPtr += 4)

      { *((volatile uint32_t *) memPtr) = memPtr; }

            Assignee:
            TI User
            Reporter:
            TI User
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              Created:
              Updated:
              Resolved:

                Connection: Intermediate to External PROD System
                EXTSYNC-2840 - Increase in Boot time when DDR ECC ...
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