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  1. Embedded Software & Tools
  2. EXT_EP-10052

Hex utility default map omits ECC address ranges

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    • Icon: Bug Bug
    • Resolution: Fixed
    • Icon: High High
    • Code Generation Tools
    • CODEGEN-8200
    • C2000_20.2.2.LTS
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      C2000_18.12.8.LTS
      C2000_20.2.3.LTS
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      C2000_18.12.8.LTS C2000_20.2.3.LTS
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      You can work around this issue by using a hex utility command file. For example:
      /*
      hex2000 thisfile.cmd <the rest of your options>
      */
      ROMS
      {
          ROW1: origin=0x00000000 len=0x100000000
      }
      Show
      You can work around this issue by using a hex utility command file. For example: /* hex2000 thisfile.cmd <the rest of your options> */ ROMS {     ROW1: origin=0x00000000 len=0x100000000 }

      Use the attached file.out.

      % hex2000 --map=file.map --romwidth=16 --intel -o file.hex file.out
Translating to Intel format...
   "file.out" .text ==> .text
   "file.out" .cinit ==> .cinit
   "file.out" .ecc2 ==> .ecc2
warning: section file.out(.ecc2) at 01080000h falls in unconfigured memory
   (skipped)
   "file.out" .ecc1 ==> .ecc1
warning: section file.out(.ecc1) at 01080001h falls in unconfigured memory
   (skipped)
   "file.out" .ecc0 ==> .ecc0
warning: section file.out(.ecc0) at 01082000h falls in unconfigured memory
   (skipped)

      The ECC sections are initialized sections on page 0.  There is no reason they should be skipped.  They are created with these lines in the linker command file ...

         BEGIN_ECC            : origin = 0x01080000, length = 0x000001, ECC = { input_range = BEGIN,           input_page = 0, algorithm = eccalgo, fill = true }
   F_BANK0_SEC0_15_ECC  : origin = 0x01080001, length = 0x001FFF, ECC = { input_range = F_BANK0_SEC0_15, input_page = 0, algorithm = eccalgo, fill = true }
   F_BANK1_SEC0_15_ECC  : origin = 0x01082000, length = 0x002000, ECC = { input_range = F_BANK1_SEC0_15, input_page = 0, algorithm = eccalgo, fill = true }

            syncuser TI User
            syncuser TI User
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              Created:
              Updated:
              Resolved: