[EXT_EP-9934] TIOVX delay parameters with pipelining result in serialization of nodes Created: 26/Jul/20  Updated: 18/Jul/24

Status: Declined
Project: Embedded Software & Tools
Component/s: None
Affects Version/s: None
Fix Version/s: None

Type: Bug Priority: Low
Reporter: TI User Assignee: TI User
Resolution: Unresolved Votes: 0
Remaining Estimate: Not Specified
Time Spent: Not Specified
Original Estimate: Not Specified

Product: OpenVX Framework
Internal ID: TIOVX-823
Found In Release: TIOVX_01.07.00
Fix In Release: TIOVX_10.02.00
Affected Platform/Device: j721e-evm
j721s2-evm
j784s4-evm
Workaround: Internal implementation of delay parameters within a node can be used to avoid this issue. Please refer to the DOF node as an example of how this can be done
Decline Reason: This is a known issue and not intended to be fixed

 Description   

TIOVX delay parameters with pipelining result in serialization nodes even though the data given to node is functionally correct.  For example, the VISS/AEWB node configuration results in the VISS node being executed then AEWB executed in serial rather than in parallel.

Workaround for delay parameters is to either use graph parameters instead of delay or to utilize a remote server call to pass delay parameter from one node to another.


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