[EXT_EP-7705] DWARF does not correctly represent variables stored in register pairs Created: 01/Jul/02  Updated: 28/Jun/22

Status: New
Project: Embedded Software & Tools
Component/s: None
Affects Version/s: None
Fix Version/s: None

Type: Bug Priority: Low
Reporter: TI User Assignee: TI User
Resolution: Unresolved Votes: 0
Remaining Estimate: Not Specified
Time Spent: Not Specified
Original Estimate: Not Specified

Product: Code Generation Tools
Internal ID: CODEGEN-63
OldID: SDSCM00008685
Found In Release: C2000_16.9.0.LTS
MSP430_21.6.0.LTS
C6000_8.1.0B1
C6000_7.4.0B1
ARM_5.2.0B1
MSP430_16.9.0.LTS
ARM_15.12.0.LTS
C6000_8.2.0
C2000_18.1.0.LTS
C2000_6.4.0B1
C6000_8.3.0
MSP430_20.2.0.LTS
ARM_18.12.0.LTS
C2000_21.6.0.LTS
MSP430_15.12.0.LTS
ARM_20.2.0.LTS
C2000_20.2.0.LTS
ARM_18.1.0.LTS
MSP430_18.1.0.LTS
ARM_16.9.0.LTS
C2000_22.6.0.LTS
C2000_15.12.0.LTS
MSP430_4.4.0B1
MSP430_18.12.0.LTS
C2000_18.12.0.LTS
Workaround:
Although 'var1' and 'var2' are shown to be in single registers, a
debugger could determine that they are actually stored in register
pairs by looking at the type of the variables:

   [00000113] DW_TAG_base_type
    DW_AT_name long long
    DW_AT_encoding 0x5
    DW_AT_byte_size 0x8

The base type indicates that the size of the variables is 0x8 bytes.
Since a single register can only store 0x4 bytes of information, it
would take two registers to hold this values.

On TI architectures, values stored in multiple registers are always
stored in consecutive registers. Thus, the debugger would know that
if the entire value could not fit in A4, the rest of the value must be
in A5. A5 would contain the upper 32 bits of the value.




 Description   

DWARF does not correctly represent variables stored in register pairs


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