The Efuse driver timing parameter were found to be outside the spec. 

The current efuse driver has timing parameter based on 41.75 MHz input clock (sys_clk) for all SoCs.

To be within the spec, the clock mux must be updated to the clock coming out of SYCLK and the timing parameter to match the SYSCLK based clock option's value.

Example for AM62A would be MAIN_SYSCLK0 / 16 = 500MHz / 16 = 31.25 MHz