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Type:
Bug
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Resolution: Fixed
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Priority:
Medium
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SITSW-6250
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10.00.00
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11.00.00
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am243x-evm
Dhrystone benchmark has "clock_freq" hardcode as shown in github code
Below is proposed fix:
uint32_t clkRateMHz = 0U;
uint64_t cpuClockRate = 0U;
cpuClockRate = SOC_getSelfCpuClk();
clkRateMHz = cpuClockRate/1000000;
Begin_Time = CycleCounterP_getCount32();
//Dhrystone test code here ...
End_Time = CycleCounterP_getCount32();
User_time = (float) (End_Time - Begin_Time)/cpuClockRate;//time
Microseconds = User_time * Mic_secs_Per_Second/ No_Of_runs;//no of runs is 500000
Dhrystones_Per_Second = No_Of_runs / User_time;
Vax_Mips = (Dhrystones_Per_Second / 1757.0);
DebugP_log("\nBENCHMARK Using clock %llu\r\n",cpuClockRate);
DebugP_log("- Usertime in sec: %lf\r\n", User_time);
DebugP_log("- Microseconds for one run through Dhrystone:%6.1f \r\n", Microseconds);
DebugP_log("- Dhrystones per Second: %6.1f \r\n", Dhrystones_Per_Second);
DebugP_log("\nNormalized MIPS/MHz: %8.4f\r\n", Dhrystones_Per_Second/1757.0/clkRateMHz);