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  1. Sitara MPU & SPMCU SDKs
  2. EXT_SITMPUSW-47

Update the DDR configuration with DDR syscfg 9.09+

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    • Icon: Bug Bug
    • Resolution: Fixed
    • Icon: Urgent Urgent
    • SITSW-5377
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      am62a-sk
      am62p-sk
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      am62a-sk am62p-sk

      There was fix done on 9.09 syscfg tool for failure observed during pre RTM characterization:

      • rx_pclk_clk_sel update

      This change was a result of read eye degradation in certain split lot material during high temperature testing and especially at low core voltages. The change specifically decreases the divider for rx_pclk to zero, which maximizes the rx_pclk frequency.  The rx_pclk drives the calibration updates on the IO cells, and thus calibration was occurring more frequently to overcome the IO sensitivity in these corner cases.  With the increased rx_pclk, no failures were seen on previously failing devices.  Full characterization of AM62A was successful with this setting.    

      In order to take this fix, please update the syscfg to latest else some customer can observe this behavior on our EVM.

            syncuser TI User
            syncuser TI User
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