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Type:
Bug
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Resolution: Fixed
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Priority:
Medium
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SITSW-8892
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11.02.00
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12.00.00
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Summary
Sciclient_procBootWaitProcessorState followed by asserting and de-asserting the reset lines via Sciclient_procBootSetSequenceCtrl, for the WKUP R5 core during self reset, fails to show expected behavior. Core remains stuck at reset.
Explanation
First noticed while attempting to align Bootloader_socCpuResetReleaseSelf in am62ax to a routine similar to DM self reset.
The following routine was followed:
- Sciclient_procBootRequestProcessor
- Sciclient_procBootGetProcessorState
- Sciclient_procBootSetProcessorCfg
- Sciclient_procBootWaitProcessorState
- Sciclient_procBootSetSequenceCtrl -> for asserting reset
- Sciclient_procBootSetSequenceCtrl -> for deasserting reset
- Sciclient_procBootReleaseProcessor
Full snippet can be observed the commit.
This resulted in the following DM logs observed in ttyUSB1:
0x0042C000: BasePort: TISCI_MSG_RECEIVED(TISCI Message interrupt handled): Queue ID: 2 Message ID: c000 0x00820024: BasePort: TISCI_MSG_SENDER_HOST_ID(Message from secure host received): Queue ID: 2 Host ID: 36 0x0042C400: BasePort: TISCI_MSG_RECEIVED(TISCI Message interrupt handled): Queue ID: 2 Message ID: c400 0x00820024: BasePort: TISCI_MSG_SENDER_HOST_ID(Message from secure host received): Queue ID: 2 Host ID: 36 0x0042C100: BasePort: TISCI_MSG_RECEIVED(TISCI Message interrupt handled): Queue ID: 2 Message ID: c100 0x00820024: BasePort: TISCI_MSG_SENDER_HOST_ID(Message from secure host received): Queue ID: 2 Host ID: 36 0x0042C401: BasePort: TISCI_MSG_RECEIVED(TISCI Message interrupt handled): Queue ID: 2 Message ID: c401 0x00820024: BasePort: TISCI_MSG_SENDER_HOST_ID(Message from secure host received): Queue ID: 2 Host ID: 36 0x0042C101: BasePort: TISCI_MSG_RECEIVED(TISCI Message interrupt handled): Queue ID: 2 Message ID: c101 0x00820024: BasePort: TISCI_MSG_SENDER_HOST_ID(Message from secure host received): Queue ID: 2 Host ID: 36
This indicates the wait for status message functionality was not correctly exhibited as the deassert message is not sent(Only one c101). The core remains held in reset.
