2 C7x cores ( c7x_0 and c7x_1 ) in AM275 are not able to run 2 different McASP instances

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    • Type: Bug
    • Resolution: Fixed
    • Priority: Urgent
    • SITSW-8759
    • 11.01.00
    • 12.00.00
    • am275x-evm

      2 C7x cores ( c7x_0 and c7x_1 ) in AM275 are not able to run 2 different McASP instances.
      Gives the following error -

      Steps to reproduce. 

      1. Import the mcasp_loopback_am275x-evm_c75ss0-0_freertos_ti-c7000 and mcasp_loopback_am275x-evm_c75ss1-0_freertos_ti-c7000 examples to CCS
      2. Modify one of the examples to use a different McASP instance and different UART instance (to avoid conflict). 
      3. Comment out line 177 (or any other), so that the transaction does not exit after loopback test. 
      4. Rebuild both projects and load the .out binaries one by one to the 2 C7x cores. 
      5. On running the first one works fine. But the C7x which runs second gives the error - [C75X_0] ASSERT: 0.1951s: mcasp/v1/mcasp_dma.c:MCASP_openDma:160: SystemP_SUCCESS == status failed !!!
      6. Attaching the 2 ccs projects (for [^c7x_0_loopback.zip]and [^c7x_1_loopback.zip]) to reproduce the error.

      I continued some investigation and found out the exact place of error- 

      • Drivers_open() [ main.c line 57 ]
      • gMcaspHandle[instCnt] = MCASP_open(instCnt, &gMcaspOpenParams[instCnt]) [ ti_drivers_open_close.c line 193]
      • MCASP_openDma(config, obj->dmaChCfg); [ mcasp.c line 288 ]
      • status = Udma_eventRegister(drvHandle, eventHandle, &eventPrms); [ mcasp_dma.c line 159]
      • retVal = Udma_eventConfig(drvHandleInt, eventHandleInt); [ udma_event.c line 172]
      • retVal = Sciclient_rmIrqSet(
        &rmIrqReq, &rmIrqResp, UDMA_SCICLIENT_TIMEOUT); [udma_event.c line 1053]

      The program is failing inside udma at Sciclient_rmIrqSet() function when 2 cores are using 2 different mcasp instances.

      I checked the resource partitioning and found out this - 

      The BCDMA channels are shared between the 2 C7x cores, which is the probable reason behind the 2nd one failing when both are running together.

            Assignee:
            TI User
            Reporter:
            TI User
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              Created:
              Updated:
              Resolved:

                Connection: Intermediate to External PROD System
                EXTSYNC-6230 - 2 C7x cores ( c7x_0 and c7x_1 ) in ...
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