The MCU+ SDK DDR driver stack starts the training/leveling sequence twice as part of the overall call to DDR_init().

First/initial start of DDR training/leveling sequence: Part of DDR_setClock() processing (frequency handshake sequence) - link

Second start of DDR training/leveling sequence: Part of DDR_start() -> LPDDR4_Start() -> LPDDR4_StartSequenceController() - link.
 
This was noticed during debugging LPDDR4-related issues where it was found that the LPDDR4_INTR_PHY_INDEP_INIT_DONE_BIT and 
LPDDR4_INTR_MC_INIT_DONE where already set upon entering the LPDDR4_StartSequenceController() function.
 
Since the DDR training/leveling sequence should only get started once together with waiting for/acknowledging the appropriate interrupt flags at the end this at a minimum is unclean and redundant and needs cleanup. Additionally, there is potential (TBD) for this to cause unknown issues internal to the LPDDR4 controller operation.
 
When inspecting the U-Boot SPL reference code sequence, it can be seen that both frequency handshake and training/leveling are all handled together in a single function cleanly, and no double-start occurs. The MCU+ SDK sequence should get better aligned with the U-Boot sequence. See lpddr4_startsequencecontroller() in the U-Boot code base (link).