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Type:
Bug
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Resolution: Unresolved
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Priority:
Medium
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SITSW-7377
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11.00.00
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11.02.00
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The EXTCSD HS_TIMING register is defined in the JEDEC spec as shown:
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The byte consists of two nibbles: 1) Drive Strength, and 2) Timing Interface
This byte is not set correctly at the following places:
- Here `es` (enhanced strobe) is set in place of the driver strength.
- Here `es` (enhanced strobe) is set in place of the driver strength.
- Here driver strength is not set.
Following are the places where the byte is set correctly: