The MMCSD_phyInit() function part of the eMMC initialization sequence contains a step to calibrate the PHY's I/Os, and for this sets the PDB bit in the PHY_CTRL_1_REG control register. The issue is that this function assumes that the bit is clear initially, as only then will setting the bit create the 0->1 PDB bit transition that is required to start the calibration process as per TRM.

However there are several cases where PDB is already set upon entering MMCSD_phyInit(), in which case the calibration sequence is NOT triggered:

1. eMMC boot due to previous boot ROM activity, and
2. Successive invocations of MMCSD_phyInit(), for example during SBL1 teardown and SBL2 startup

The below proposed code change will unconditionally force a 0->1 transition of this control bit and with this ensure the calibration is performed.

--- a/source/drivers/mmcsd/v0/mmcsd_v0.c
+++ b/source/drivers/mmcsd/v0/mmcsd_v0.c
@@ -2607,7 +2607,8 @@ static int32_t MMCSD_phyInit(uint32_t ssBaseAddr, uint32_t phyType)
         CSL_REG32_FINS(&ssReg->PHY_CTRL_1_REG, MMC_SSCFG_PHY_CTRL_1_REG_EN_RTRIM, 1U);
         while(CSL_REG32_FEXT(&ssReg->PHY_CTRL_1_REG, MMC_SSCFG_PHY_CTRL_1_REG_EN_RTRIM) != 1U);
 
-        /* Set PDB to trigger calibration */
+        /* Set PDB to 0->1 to trigger calibration */
+        CSL_REG32_FINS(&ssReg->PHY_CTRL_1_REG, MMC_SSCFG_PHY_CTRL_1_REG_PDB, 0U);
         CSL_REG32_FINS(&ssReg->PHY_CTRL_1_REG, MMC_SSCFG_PHY_CTRL_1_REG_PDB, 1U);
 
         /* Wait for calibration to finish */