This defect is specific to processors that use the -mv6200, -mv6400, -mv6700, and -mv64p/-mv6400+/-mv6500 options (or equivalent --silicon_version options).

This defect does not occur when using the -mv6740 or -mv6600 compiler options or equivalent --silicon_version options.

This defect involves the compiler creating too many reads of a single register on one cycle. The affected processors in question limit the number of reads of the same register in the same cycle to 4 reads. The compiler will generate this type of erroneous code only in rare circumstances and only with the -mv options specified above in the first sentence of this description.

The defect does not occur on 6740 or 6600 CPUs because those processors can have an unlimited number of reads of one register per cycle.

Note that the 8.3.x C6000 C/C++ compiler does not support -mv6200, -mv6400, -mv6700, or -mv67p.

If the compiler generates too many reads of one register per cycle on the affected ISAs/processor, the compiler will emit an error message and fail to produce an assembly file.

If a user encounters this error message, the workaround is to use the -ms0 or -ms1 option which will cause the compiler to not execute certain optimizations that could produce this type of erroneous sequence of code. The use of -ms0 or -ms1 may negatively affect the performance of the compiler emitted code.