[EXT_EP-12063] Update the DDR configuration with DDR syscfg 9.09+ Created: 13/Dec/24  Updated: 13/Dec/24  Resolved: 13/Dec/24

Status: Fixed
Project: Embedded Software & Tools
Component/s: None
Affects Version/s: None
Fix Version/s: None

Type: Bug Priority: Urgent
Reporter: TI User Assignee: TI User
Resolution: Fixed Votes: 0
Remaining Estimate: Not Specified
Time Spent: Not Specified
Original Estimate: Not Specified

Product: Linux Core SDK
Internal ID: LCPD-39016
Found In Release: 09.02.00
10.00
09.00.00
09.01.00
Fix In Release: 10.01
Affected Platform/Device: am62axx_sk-fs
am62axx_sk-se
am62pxx_sk-fs
am62pxx_sk-se

 Description   

There was fix done on 9.09 syscfg tool for failure observed during pre RTM characterization:

  • rx_pclk_clk_sel update

This change was a result of read eye degradation in certain split lot material during high temperature testing and especially at low core voltages. The change specifically decreases the divider for rx_pclk to zero, which maximizes the rx_pclk frequency.  The rx_pclk drives the calibration updates on the IO cells, and thus calibration was occurring more frequently to overcome the IO sensitivity in these corner cases.  With the increased rx_pclk, no failures were seen on previously failing devices.  Full characterization of AM62A was successful with this setting.    

In order to take this fix, please update the syscfg to latest else some customer can observe this behavior on our EVM.


Generated at Fri May 01 09:57:41 CDT 2026 using Jira 10.3.7#10030007-sha1:a563685562f94d165eb4e158cfb2a142338d8c54.