[EXT_EP-11277] MCAL CAN example PADCONFIG register offset mismatch Created: 20/Jul/23 Updated: 20/Jul/23 Resolved: 20/Jul/23 |
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| Status: | Fixed |
| Project: | Embedded Software & Tools |
| Component/s: | None |
| Affects Version/s: | None |
| Fix Version/s: | None |
| Type: | Bug | Priority: | Medium |
| Reporter: | TI User | Assignee: | TI User |
| Resolution: | Fixed | Votes: | 0 |
| Remaining Estimate: | Not Specified | ||
| Time Spent: | Not Specified | ||
| Original Estimate: | Not Specified | ||
| Product: | MCAL |
| Internal ID: | MCAL-8752 |
| Found In Release: | PROCESSOR-CORESDK_08.02.00 |
| Fix In Release: | MCUSW_J7_09.00.00 |
| Affected Platform/Device: | j7200-evm |
| Description |
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PADCONFIG register offsets are wrong for MCAL CAN example for j7200 SOC. Refer to the file SDK\mcusw\mcal_drv\mcal\examples\can\soc\j7200\mcu2_1\CanApp_Startup.c Looks like the above file is taken from J721e. The corresponding file for mcu1_0 looks fine. Issue reported in E2E: https://e2e.ti.com/support/processors-group/processors---internal/f/processors---internal-forum/1068829/dra821u-mismatch-in-mcusw-can-profiling-demo |