[EXT_EP-10350] _enable_IRQ in ti_compatibility.h only supports Cortex-M devices Created: 17/May/21  Updated: 06/Sep/22  Resolved: 29/Jul/21

Status: Fixed
Project: Embedded Software & Tools
Component/s: None
Affects Version/s: None
Fix Version/s: None

Type: Bug Priority: Medium
Reporter: TI User Assignee: TI User
Resolution: Fixed Votes: 0
Remaining Estimate: Not Specified
Time Spent: Not Specified
Original Estimate: Not Specified

Product: Code Generation Tools
Internal ID: CODEGEN-8914
Forum URL: https://e2e.ti.com/support/tools/code-composer-studio-group/ccs/f/81/t/1001588
Found In Release: ARMCLANG_1.2.0.STS
Fix In Release: ARMCLANG_1.3.1.LTS
Affected Platform/Device: default

 Description   

Use the attached file.c to run these commands ....

C:\Userdata\mytemp>type file.c
#include <ti_compatibility.h>

void fxn()
{
   _enable_IRQ();
}

C:\Userdata\mytemp>tiarmclang -g -mcpu=cortex-m0 -c file.c

C:\Userdata\mytemp>tiarmobjdump -dS file.o

file.o: file format elf32-littlearm


Disassembly of section .text.fxn:

00000000 <fxn>:
; {
       0: 82 b0         sub     sp, #8
       2: 00 20         movs    r0, #0
;     uint32_t res = 0;
       4: 01 90         str     r0, [sp, #4]
;     __asm volatile ("MRS %0, PRIMASK" :  "=r" (res) : : );
       6: ef f3 10 80   mrs     r0, primask
       a: 01 90         str     r0, [sp, #4]
;     return res;
       c: 01 98         ldr     r0, [sp, #4]
;     uint32_t primask = __get_PRIMASK();
       e: 00 90         str     r0, [sp]
;     __asm volatile ("CPSIE I" : : : );
      10: 62 b6         cpsie i
; }
      12: 02 b0         add     sp, #8
      14: 70 47         bx      lr

C:\Userdata\mytemp>tiarmclang -g -mcpu=cortex-r4 -c file.c

C:\Userdata\mytemp>tiarmobjdump -dS file.o

file.o: file format elf32-littlearm


Disassembly of section .text.fxn:

00000000 <fxn>:
; }
       0: 1e ff 2f e1   bx      lr

The source file invokes the intrinsic _enable_IRQ, which is supported by the TI proprietary ARM compiler armcl. These commands show that when built for a Cortex-M0 device, correct code is generated. When built for Cortex-R4 devices, nothing is generated.

Note the lack of diagnostics that would let a user know something is wrong.


Generated at Tue Apr 22 19:56:29 CDT 2025 using Jira 9.12.17#9120017-sha1:aba4002bcd633f188b6a4bb5dd8a0e1f20b79ee4.