[EXT_EP-10175] Hex utility, when splitting a section as required by the bootloader, ignores the section alignment for the second part of the split Created: 28/Dec/20 Updated: 13/Oct/25 Resolved: 20/Apr/22 |
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| Status: | Fixed |
| Project: | Embedded Software & Tools |
| Component/s: | None |
| Affects Version/s: | None |
| Fix Version/s: | None |
| Type: | Bug | Priority: | Medium |
| Reporter: | TI User | Assignee: | TI User |
| Resolution: | Fixed | Votes: | 0 |
| Remaining Estimate: | Not Specified | ||
| Time Spent: | Not Specified | ||
| Original Estimate: | Not Specified | ||
| Product: | Code Generation Tools |
| Internal ID: | CODEGEN-8471 |
| Forum URL: | https://e2e.ti.com/support/microcontrollers/c2000/f/171/t/964813 |
| Found In Release: | C2000_21.12.0.STS ARMCLANG_2.1.0.BETA1 ARM_18.12.0.LTS ARMCLANG_1.3.0.LTS C2000_21.6.0.LTS ARM_20.2.0.LTS C2000_20.2.0.LTS |
| Fix In Release: | ARM_20.2.7.LTS ARMCLANG_2.1.1.LTS C2000_22.6.0.LTS C2000_20.2.7.LTS ARMCLANG_1.3.2.LTS* ARM_18.12.9.LTS* C2000_21.6.1.LTS |
| Affected Platform/Device: | default |
| Workaround: | Determine which sections exceed the length limit of 0xfffe words. Then apply LINKER command file section splitting to those sections so the hex utility does not see a section longer than 0xfffe words. For an example, see https://e2e.ti.com/support/microcontrollers/c2000/f/171/p/964813/3571661#3571661 |
| Description |
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The option --boot tells the hex utility all the initialized sections are to be laid out as required by the on-chip bootloader. This bootloader cannot handle any section which is larger than 0xfffe words. So, when this occurs, the hex utility splits the section up, and starts another bootload-style record for the next part of the split. When this happens, the hex utility fails to check the alignment requirements of the section to make sure the the starting address of the second record meets that alignment. |